Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 9/29/2022
Public
Document Table of Contents

4. Clock Networks and PLLs in Intel® Arria® 10 Devices

This chapter describes the advanced features of hierarchical clock networks and phase-locked loops (PLLs) in Intel® Arria® 10 devices. The Intel® Quartus® Prime software enables the PLLs and their features without external devices.

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