Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 9/29/2022
Public
Document Table of Contents

1.3. LAB Power Management Techniques

Use the following techniques to manage static and dynamic power consumption within the LAB:

  • Intel® Arria® 10 LABs operate in high-performance mode or low-power mode. The Intel® Quartus® Prime software automatically optimizes the LAB power consumption mode based on your design.
  • Clocks, especially LAB clocks, consumes a significant portion of dynamic power. Each LAB's clock and clock enable signals are linked and can be controlled by a shared, gated clock. Use the LAB-wide clock enable signal to gate the LAB-wide clock without disabling the entire clock tree. In your HDL code for registered logic, use a clock-enable construct.

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