Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 5/27/2022
Public
Download
Document Table of Contents

6.5.6.1. Intel® Arria® 10 Package Support for DDR3 x40 with ECC for HPS

To support one DDR3 x40 interface with ECC (32 bits data + 8 bits ECC) for HPS, you are required to use two I/O banks below the top 3 V I/O bank in the DDR column.

Table 85.  Number of DDR3 x40 Interfaces (with ECC) for HPS Supported Per Device PackageThis table lists the number of external memory interfaces supported for HPS only.
Product Line Package
U19 F27 F29 F34 F35 NF40 KF40
SX 160 1 1 1
SX 220 1 1 1
SX 270 1 1 1 1
SX 320 1 1 1 1
SX 480 1 1 1
SX 570 1 1 1 1
SX 660 1 1 1 1

Did you find the information on this page useful?

Characters remaining:

Feedback Message