Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 5/27/2022
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3.3.5. DSP Block Cascade Limit in Intel® Arria® 10 Devices

The spine clock region limits the number of DSP blocks cascade. For Intel® Arria® 10 devices, you can cascade up to 27 DSP blocks.

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