Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 7/08/2024
Document Table of Contents

3.3.5. DSP Block Cascade Limit in Agilex™ 7 Devices

The spine clock region limits the number of DSP blocks cascade. For Agilex™ 7 devices, you can cascade up to 27 DSP blocks.