Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 10/25/2023
Public
Document Table of Contents

6.3. External Memory Interface Widths in Arria® 10 Devices

The Arria® 10 devices can support the following external memory interface widths:

  • Up to x144 interfaces for DDR4 and DDR3
  • Up to x72 for RLDRAM 3 and QDR II+ Xtreme
Table 75.  Required I/O Banks for Interface WidthsThis table lists the number of I/O banks required to support different external memory interface widths. You must implement each single memory interface using the I/O banks in the same I/O column.

This table is a guideline and represents the worst-case scenario for these interface widths. Certain interfaces can be implemented using fewer I/Os and does not take up the full I/O bank.

Except for DDR4 interfaces, if the total number of address/command pins exceeds 36, you require one more I/O bank than the number listed in this table. For DDR4 interfaces, the additional I/O bank is required if the number of address/command pins exceeds 37.

Interface Width Required Number of I/O Banks
x8 1
x16, x24, x32, x40 2
x48, x56, x64, x72 3
x80, x88, x96, x104 4
x112, x120, x128, x136 5
x144 6