Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 7/08/2024
Public
Document Table of Contents

5.5.4. On-Chip I/O Termination in Arria® 10 Devices

Serial (RS) and parallel (RT) OCT provides I/O impedance matching and termination capabilities. OCT maintains signal quality, saves board space, and reduces external component costs.

The Arria® 10 devices support OCT in all FPGA and HPS I/O banks. For the 3 V and HPS I/Os, the I/Os support only OCT without calibration.

Figure 84. Single-ended Termination (RS and RT) This figure shows the single-ended termination schemes supported in Arria® 10 devices. RT1 and RT2 are dynamic parallel terminations and are enabled only if the device is receiving. In bidirectional applications, RT1 and RT2 are automatically switched on when the device is receiving and switched off when the device is driving.


Table 54.  OCT Schemes Supported in Arria® 10 Devices
Direction OCT Schemes I/O Type Support
LVDS I/O 3 V I/O HPS I/O
Output RS OCT with calibration Yes
RS OCT without calibration Yes Yes Yes
Input RT OCT with calibration Yes
RD OCT (LVDS I/O standard only) Yes
Bidirectional Dynamic RS and RT OCT Yes