Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 9/29/2022
Public
Document Table of Contents

9.6.2. IEEE Std. 1149.6 Boundary-Scan Register

The BSCs for HSSI transmitters ( GXB_TX[p,n] ) and receivers/input clock buffers (GXB_RX[p,n]) /(REFCLK[p,n]) in Intel® Arria® 10 devices are different from the BSCs for the I/O pins.

Note: You have to use the EXTEST_PULSE JTAG instruction for AC-coupling on HSSI transceiver. Do not use the EXTEST JTAG instruction for AC-coupling on HSSI transceiver. You can perform AC JTAG on the Intel® Arria® 10 device before, after, and during configuration.
Figure 178. HSSI Transmitter BSC with IEEE Std. 1149.6 BST Circuitry for Intel® Arria® 10 Devices


Figure 179. HSSI Receiver/Input Clock Buffer with IEEE Std. 1149.6 BST Circuitry for Intel® Arria® 10 Devices


Did you find the information on this page useful?

Characters remaining:

Feedback Message