Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 9/29/2022
Public
Document Table of Contents

3.3.2. Internal Coefficient and Pre-Adder for Fixed-Point Arithmetic

When you enable input register for the pre-adder feature, these input registers must have the same clock setting.

The input cascade support is only available for 18-bit mode when you enable the pre-adder feature.

In both 18-bit and 27-bit modes, you can use the coefficient feature and pre-adder feature independently.

When internal coefficient feature is enabled in 18-bit modes, you must enable both top and bottom coefficient.

When pre-adder feature is enabled in 18-bit modes, you must enable both top and bottom pre-adder.

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