Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 1/21/2022
Public
Download
Document Table of Contents

8.2.4.2.1. Component FIT Rates

The Projected SEU FIT by Component report shows FIT for the following components:

  • SRAM embedded memory in embedded processors hard IP and M20K or M10K blocks
  • CRAM used for LUT masks and routing configuration bits
  • LABs in MLAB mode
  • I/O configuration registers, which the FPGA implements differently than CRAM and design flipflops
  • Standard flipflops the design uses in the address and data registers of M20K blocks, in DSP blocks, and in hard IP
  • User flipflops the design implements in logic cells (ALMs or LEs)