Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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16.5.4. Non-Data Transfer Commands

To send any non‑data transfer command, the software needs to write the cmd register and the cmdarg register with appropriate parameters. Using these two registers, the controller forms the command and sends it to the CMD pin. The controller reports errors in the command response through the error bits of the rintsts register.

When a response is received—either erroneous or valid—the controller sets the command_done bit in the rintsts register to 1. A short response is copied to resp0, while a long response is copied to all four response registers (resp0, resp1, resp2, and resp3). For long responses, bit 31 of resp3 represents the MSB and bit 0 of resp0 represents the LSB.

For basic and non‑data transfer commands, perform the following steps:

  1. Write the cmdarg register with the appropriate command argument parameter.
  2. Write the cmd register with the settings in Register Settings for Non-Data Transfer Command.
  3. Wait for the controller to accept the command. The start_cmd bit changes to 0 when the command is accepted.

    The following actions occur when the command is loaded into the controller:

    • If no previous command is being processed, the controller accepts the command for execution and resets the start_cmd bit in the cmd register to 0. If a previous command is being processed, the controller loads the new command in the command buffer.
    • If the controller is unable to load the new command—that is, a command is already in progress, a second command is in the buffer, and a third command is attempted—the controller generates a hardware lock error.
  4. Check if there is a hardware lock error.
  5. Wait for command execution to complete. After receiving either a response from a card or response timeout, the controller sets the command_done bit in the rintsts register to 1. Software can either poll for this bit or respond to a generated interrupt (if enabled).
  6. Check if the response timeout boot acknowledge received (bar), rcrc, or re bit is set to 1. Software can either respond to an interrupt raised by these errors or poll the re, rcrc, and bar bits of the rintsts register. If no response error is received, the response is valid. If required, software can copy the response from the response registers.
Note: Software cannot modify clock parameters while a command is being executed.