Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

15.5.2.6.2. Set Up a Single Area for Pipeline Read-Ahead

To set up an area for pipeline read‑ahead, perform the following steps:
  1. Write to the command register, setting the CMD_MAP field to 2 and the BLK_ADDR field to the starting address of the block to pre‑read.
  2. Write 0x20<PP> to the Data register, where the 0 sets this command as a read‑ahead and <PP> is the number of pages to pre‑read. The pages must not cross a block boundary. If a block boundary is crossed, the NAND flash controller generates an unsupported command (unsup_cmd) interrupt and drops the command.

The read‑ahead command is a hint to the flash device to start loading the next page in the page buffer as soon as the previous page buffer operation has completed. After you set up the read‑ahead, use a MAP01 command to actually read the data. In the MAP01 command, specify the same starting address as in the read‑ahead.

If the read command received following a pipeline read‑ahead request is not to a pre‑read page, then an interrupt bit is set to 1 and the pipeline read‑ahead or write‑ahead registers are cleared. You must issue a new pipeline read‑ahead request to re‑load the same data. You must use MAP01 commands to read all of the data that is pre‑read before the NAND flash controller returns to the idle state.