Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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2.2.10.7. GPIO Interfaces

The HPS provides two GPIO interfaces that are based on the Synopsys® DesignWare* APB* General Purpose Programming I/O peripheral. Together, these interfaces support up to 48 dedicated GPIO pins with input and output capability. Each GPIO interface offers the following features:
  • Digital de-bounce
  • Configurable interrupt mode
  • Configurable hardware and software control for each signal
  • Level and edge interrupts