Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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10.4.4.4.2. Peripheral Slave Interface Tests for DMA ECC RAM

Only the DMA ECC RAM can be tested using the peripheral slave interface. Data and ECC overwrite bits in the ECC_accctrl register are provided to test the functionality of the peripheral interface to the ECC-protected RAM.

ECC-Enabled Test

The following sequence can be used to test if the ECC decoder works correctly.
  1. Enable the ECC by setting the ECC_EN bit in the CTRL register.
  2. Write data to any ECC-protected RAM memory location. This action generates an ECC value that can be read through the ECC_Rdataecc0bus and ECC_Rdataecc1bus registers.
  3. Read back the memory data through the register bus interface. Expect the data read to match the data originally written (with or without a single-bit error) or a double-bit error to be logged. Refer to the "Error Logging" section for more details about identifying errors.

ECC-Disabled Test

This sequence can be used to test that the ECC decoder does not produce output when disabled.
  1. Disable the ECC by clearing the ECC_EN bit in the CTRL register.
  2. Write to any ECC-protected RAM memory location. Expect no ECC value to be generated and no interrupt or error logging to occur.
  3. The ECC value can be read through the ECC_Rdataecc0bus and ECC_Rdataecc1bus registers to verify that the ECC values do not correspond to the read memory data.

ECC Disable/Enable Test

This sequence shows that memory data written when the ECC controller is disabled generates an error if the ECC controller is subsequently enabled and the same memory data location is read.

  1. Disable the ECC by clearing the ECC_EN bit in the CTRL register.
  2. Write to any ECC-protected RAM memory location. Expect no ECC value to be generated and no interrupt or error logging to occur.
  3. Enable the ECC by setting the ECC_EN bit in the CTRL register.
  4. Read data from the ECC-protected RAM memory location you wrote in step 2.
  5. Expect an error to be generated because the ECC value corresponding to the memory data is not correct. Refer to the Error Logging section for more details about identifying errors.