Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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6.2.9.2.2. SDRAM Adapter Interrupt Support

The SDRAM adapter supports the following three interrupts:

  • The status interrupt occurs when:
    • Calibration is complete.
    • The ECC is unable to schedule an auto-correction write-back to memory. This occurs only when the auto-write-back FIFO buffer is full.
  • The ECC read-back interrupt occurs when the ECC hardware detects a single-bit error in the read data. When this happens, hardware corrects the data and returns it to the interconnect.
  • The double-bit or fatal error interrupt occurs when any of the following three errors happens:
    • The ECC hardware detects a double-bit error in the read data, which cannot be corrected.
    • The ECC hardware detects a single-bit error in the address field. This means that the adapter is returning data that is free from errors, but is not the requested data. When this happens, the adapter returns a data error along with the data.
    • Any of the DDR4 devices have triggered their ALERT pins.
      • Parity check failed on the address or command
      • Write data CRC check failed
      • Cannot gracefully recover because SDRAMs are not providing feedback on failure case