Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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Document Table of Contents

19.1. Features of the SPI Controller

The SPI controller has the following features: †

  • Serial master and serial slave controllers – Enable serial communication with serial‑master or serial‑slave peripheral devices. †
  • Each SPI master has a maximum bit rate of 60Mbps
  • Each SPI slave has a maximum bit rate of 33.33Mbps
  • Serial interface operation – Programmable choice of the following protocols:
    • Motorola SPI protocol
    • Texas Instruments Synchronous Serial Protocol
    • National Semiconductor Microwire
  • DMA controller interface integrated with HPS DMA controller
  • SPI master supports received serial data bit (RXD) sample delay
  • Transmit and receive FIFO buffers are 256 words deep
  • SPI master supports up to four slave selects
  • Programmable master serial bit rate
  • Programmable data frame size of 4 to 16 or 32 bits