4.1.1. MAC Architecture
The FIFO buffers, which you can configure to 8 or 32 bits wide, store the transmit and receive data. The buffer width determines the data width on the Avalon® streaming receive and transmit interfaces. You can configure the FIFO buffers to operate in cut-through or store-and-forward mode using the rx_section_full and tx_section_full registers.
In a multiport MAC, the instances share the MDIO master and some configuration registers. You can use the Avalon® Streaming Multi-Channel Shared Memory FIFO core in the Platform Designer to store the transmit and receive data.
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