Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 5/30/2022
Public
Document Table of Contents

9. Testbench

You can use the testbench provided with the Triple-Speed Ethernet Intel® FPGA IP to exercise your custom IP variation. The testbench includes the following features:
  • Easy-to-use simulation environment for any standard HDL simulator.
  • Simulation of all basic Ethernet packet transactions.
  • Open source Verilog HDL and VHDL testbench files.

The provided testbench applies only to custom IP variations created using Platform Designer.

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