Triple-Speed Ethernet Intel® FPGA IP User Guide

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ID 683402
Date 5/30/2022
Public
Document Table of Contents

6.1.2.1. Multiport MAC Clock and Reset Signals

Table 68.   Clock Signals
Name Avalon Streaming Signal Type I/O Description
mac_rx_clk_n clk O Receive MAC clock (2.5/25/125 MHz) for the Avalon streaming receive data and receive packet classification interfaces.
mac_tx_clk_n clk O Transmit MAC clock (2.5/25/125 MHz) for the Avalon streaming transmit data interface.

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