Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 11/25/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.3. Intel FPGA IEEE 1588v2

The Intel FPGA IEEE 1588v2 provides a timestamp for receiving and transmitting frames in the Triple-Speed Ethernet Intel® FPGA IP designs. This feature consists of Precision Time Protocol (PTP). PTP is a layer-3 protocol that accurately synchronizes all real time-of-day clocks in a network to a master clock.