Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 11/25/2022

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Document Table of Contents CRC-32 Generation

To turn on CRC-32 generation, you must set the OMIT_CRC bit in the tx_cmd_stat register to 0 and send the frame to the MAC function with the ff_tx_crc_fwd signal deasserted.

The following equation shows the CRC polynomial, as specified in the IEEE 802.3 standard:

FCS(X) = X 32 +X 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 +X 8 +X 7 +X 5 +X 4 +X 2 +X 1 +1

The 32-bit CRC value occupies the FCS field with X31 in the least significant bit of the first byte. The CRC bits are thus transmitted in the following order: X31, X30, ..., X1, X0.