Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 5/30/2022
Public
Document Table of Contents

2.2.1. Design Constraint File No Longer Generated

For a new Triple-Speed Ethernet Intel® FPGA IP created using the Intel® Quartus® Prime software version 13.0 or later, the software no longer generate the <variation_name>_constraints.tcl file that contains the necessary constraints for the compilation of your IP variation.

The following table lists the recommended Intel® Quartus® Prime pin assignments that you can set in your design.

Table 17.  Recommended Intel® Quartus® Prime Pin Assignments
Pin Assignment Assignment Value Description Design Pin
FAST_INPUT_REGISTER ON To optimize I/O timing for MII, GMII and TBI interface. MII, GMII, RGMII, TBI input pins.
FAST_OUTPUT_REGISTER ON To optimize I/O timing for MII, GMII and TBI interface. MII, GMII, RGMII, TBI output pins.
IO_STANDARD 1.4-V PCML or 1.5-V PCML I/O standard for GXB serial input and output pins. GXB transceiver serial input and output pins.
IO_STANDARD LVDS I/O standard for LVDS/IO serial input and output pins. LVDS/IO transceiver serial input and output pins.
GLOBAL_SIGNAL Global clock To assign clock signals to use the global clock network. Use this setting to guide the Intel® Quartus® Prime software in the fitter process for better timing closure.
  • clk and reset pins for MAC only (without internal FIFO).
  • clk and ref_clk input pins for MAC and PCS with transceiver (without internal FIFO).
GLOBAL_SIGNAL Regional clock To assign clock signals to use the regional clock network. Use this setting to guide the Intel® Quartus® Prime software in the fitter process for better timing closure.
  • rx_clk <n> and tx_clk <n> input pins for MAC only using MII/GMII interface (without internal FIFO).
  • rx_clk <n> input pin for MAC only using RGMII interface (without internal FIFO).
GLOBAL_SIGNAL OFF To prevent a signal to be used as a global signal. Signals for Arria® V devices:
  • *reset_ff_wr and *reset_ff_rd
  • *| altera_tse_reset_synchronizer_chain_out

Did you find the information on this page useful?

Characters remaining:

Feedback Message