Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 5/30/2022
Public
Document Table of Contents

9.2. Testbench Components

The testbench comprises the following modules:
  • Device under test (DUT)—Your custom IP variation
  • Avalon streaming Ethernet frame generator—Simulates a user application connected to the MAC system-side interface. It generates frames on the Avalon streaming transmit interface.
  • Avalon streaming Ethernet frame monitor—Simulates a user application receiving frames from the MAC system-side interface. It monitors the Avalon streaming receive interface and decodes all data received.
  • MII/RGMII/GMII Ethernet frame generator—Simulates a MAC function that sends frames to the PCS function.
  • MII/RGMII/GMII Ethernet frame monitor—Simulates a MAC function that receives frames from the PCS function and decodes them.
  • MDIO slaves—Simulates a PHY management interface. It responds to an MDIO master transactor.
  • Clock and reset generator.
Table 122.  Testbench Components
Configuration System-Side Interface Ethernet-Side Interface Frame Generator Frame Monitor
MAC only Avalon® streaming interface GMII/MII/RGMII Avalon streaming frame generator Avalon streaming frame monitor
MAC with PCS Avalon® streaming interface TBI Avalon streaming frame generator Avalon streaming frame monitor
MAC with PCS and embedded PMA Avalon® streaming interface 1.25 Gbps Avalon streaming frame generator Avalon streaming frame monitor
PCS only GMII/MII TBI GMII/MII frame generator GMII/MII frame monitor
PCS with embedded PMA GMII/MII 1.25 Gbps GMII/MII frame generator GMII/MII frame monitor

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