Triple-Speed Ethernet Intel® FPGA IP User Guide

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ID 683402
Date 5/30/2022
Public
Document Table of Contents

4.1.4.6. CRC Checking

The following equation shows the CRC polynomial, as specified in the IEEE 802.3 standard:

FCS(X) = X 32 +X 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 +X 8 +X 7 +X 5 +X 4 +X 2 +X 1 +1

The 32-bit CRC value occupies the FCS field with X31 in the least significant bit of the first byte. The CRC bits are thus received in the following order: X31, X30,..., X1, X0.

If the MAC function detects CRC-32 error, it marks the frame invalid by asserting the following signals:

  • rx_err[2] in MAC variations with internal FIFO buffers.
  • data_rx_error[1] in MAC variations without internal FIFO buffers.

The MAC function discards frames with CRC-32 error if the RX_ERR_DISC bit in the command_config register is set to 1.

For frames less than the required minimum length, the MAC function forwards the CRC-32 field to the user application if the CRC_FWD and PAD_EN bits in the command_config register are 1 and 0 respectively. Otherwise, the CRC-32 field is removed from the frame.

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