Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 11/25/2022

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Document Table of Contents Programmable 10/100 Ethernet

Connect 10/100 Ethernet PHYs to the MAC function via MII. On the receive path, connect the 25-MHz (100 Mbps) or 2.5-MHz (10 Mbps) clock provided by the PHY device to the MAC clock, rx_clk. On the transmit path, connect the 25 MHz (100 Mbps) or a 2.5 MHz (10 Mbps) clock provided by the PHY to the MAC clock, tx_clk.
Figure 22. 10/100 PHY Interface