Triple-Speed Ethernet Intel® FPGA IP User Guide

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ID 683402
Date 5/30/2022
Public
Document Table of Contents

6.1.11. 10/100/1000 Multiport Ethernet MAC with 1000BASE-X/SGMII PCS and Embedded PMA Signals

Figure 58. 10/100/1000 Multiport Ethernet MAC Function without Internal FIFO Buffers, with IEEE 1588v2, 1000BASE-X/SGMII PCS and Embedded PMA Signals


Note to 10/100/1000 Multiport Ethernet MAC Function without Internal FIFO Buffers, with IEEE 1588v2, 1000BASE-X/SGMII PCS and Embedded PMA Signals:

  1. The SERDES control signals are present in variations targeting devices with GX transceivers. For Stratix® II GX and Arria® GX devices, the reconfiguration signals—reconfig_clk, reconfig_togxb, and reconfig_fromgxb—are included only when the Enable transceiver dynamic reconfiguration option is turned on. The reconfiguration signals—gxb_cal_blk_clk, pcs_pwrdwn_out, gxb_pwrdn_in, reconfig_clk, and reconfig_busy—are not present in variations targeting Intel® Arria® 10, Stratix® V, Arria® V, and Cyclone® V devices with GX transceivers.
    Table 97.  References
    Interface Signal Section
    Clock and reset signals Clock and Reset Signals
    MAC control interface MAC Control Interface Signals
    MAC transmit interface MAC Transmit Interface Signals
    MAC receive interface MAC Receive Interface Signals
    MAC packet classification signals Multiport MAC Packet Classification Signals
    MAC FIFO status signals Multiport MAC FIFO Status Signals
    Pause and magic packet signals Pause and Magic Packet Signals
    PHY management signals PHY Management Signals
    1.25 Gbps serial signals 1.25 Gbps Serial Interface
    Status LED control signals Status LED Control Signals
    SERDES control signals SERDES Control Signals
    Transceiver Native PHY signal Transceiver Native PHY Signal
    IEEE 1588v2 RX timestamp signals IEEE 1588v2 RX Timestamp Signals
    IEEE 1588v2 TX timestamp signals IEEE 1588v2 TX Timestamp Signals
    IEEE 1588v2 TX timestamp request signals IEEE 1588v2 TX Timestamp Request Signals
    IEEE 1588v2 TX insert control timestamp signals IEEE 1588v2 TX Insert Control Timestamp Signals
    IEEE 1588v2 TOD clock interface signals IEEE 1588v2 Time-of-Day (TOD) Clock Interface Signals

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