Triple-Speed Ethernet Intel® FPGA IP User Guide

ID 683402
Date 5/30/2022
Public
Document Table of Contents

10.6.4. alt_tse_system_add_sys()

Details
Prototype: alt_tse_system_add_sys(alt_tse_system_mac *psys_mac, alt_tse_system_sgdma *psys_sgdma, alt_tse_system_desc_mem *psys_mem, alt_tse_system_shared_fifo *psys_shared_fifo, alt_tse_system_phy *psys_phy)
Thread-safe: No
Available from ISR: No
Include: <system.h><system.h><altera_avalon_tse_system_info.h>
<altera_avalon_tse.h><altera_avalon_tse_system_info.h>
<altera_avalon_tse_system_info.h><altera_avalon_tse_system_info.h>
Description: The alt_tse_system_add_sys() function defines the TSE system’s components: MAC, scatter-gather DMA, memory, FIFO and PHY. This needs to be done for each port in the system.
Parameter: psys_mac—A pointer to the MAC structure.


psys_sgdma—A pointer to the scatter-gather DMA structure.


psys_mem—A pointer to the memory structure.


psys_shared_fifo—A pointer to the FIFO structure.


psys_phy—A pointer to the PHY structure.

Return: SUCCESS if the operation is successful.SUCCESS if the operation is successful.
ALTERA_TSE_MALLOC_FAILED if the operation fails.
ALTERA_TSE_SYSTEM_DEF_ERROR if one or more of the definitions are incorrect, or empty.

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