Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

30.2.2. Reset Interface

The HPS reset request and handshake interfaces are connected to conduit BFMs for simulation.

Table 263.  HPS Reset Input Interface Simulation ModelYou can monitor the reset request interface state changes or set the interface by using the API listed.

Interface Name

BFM Instance Name

API Function Names

f2h_cold_reset_req f2h_cold_reset_req_inst

get_f2h_cold_rst_req_n()

f2h_debug_reset_req f2h_debug_reset_req_inst

get_f2h_dbg_rst_req_n()

f2h_warm_reset_req f2h_warm_reset_req_inst

get_f2h_warm_rst_req_n()

h2f_warm_reset_handshake h2f_warm_reset_handshake_inst

set_h2f_pending_rst_req_n()

get_f2h_pending_rst_ack_n()

Table 264.  HPS Reset Output Interface Simulation ModelThe reset source BFM application programming interface applies to all the BFMs listed.

Interface Name

BFM Instance Name

h2f_reset h2f_reset_inst
h2f_cold_reset h2f_cold_reset_inst
h2f_debug_apb_reset h2f_debug_apb_reset_inst
Table 265.  Configuration of Reset Source BFM for HPS Reset Output InterfaceThe HPS reset output interface is connected to a reset source BFM. Platform Designer (Standard) configures the BFM as shown in the following table. The parameter value of the instantiated BFM is configured for HPS simulation.

Parameter

BFM Value

Meaning

Assert reset high

Off

This parameter is off, specifying an active‑low reset signal from the BFM.

Cycles of initial reset

0

This parameter is 0, specifying that the BFM does not assert the reset signal automatically.