Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

7.1.3.6. FPGA Security Features

The FPGA has several security fuses which can control the following functions:

  • Limiting acceptance of only encrypted and authenticated POFs
  • Disabling partial reconfiguration and scrubbing
  • Disabling test access
  • Disabling external configuration
  • Limiting JTAG access
  • Bypassing HPS or FPGA JTAG
  • Locking or disabling the battery-backed volatile key
  • Disabling the OTP key

Note that there is a fuse sent to the FPGA CSS, called hps_jtag_bypass, which performs the same function of removing the HPS from the JTAG chain. However, this fuse is a permanent disable, whereas using software to program the sec_jtagdbg register has the same affect, but may be changed later by software.