Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

18.7. Ethernet MAC Address Map and Register Definitions

The address map and register definitions pertain to the following modules:

  • EMAC Module 0
  • EMAC Module 1
  • EMAC Module 2

In addition to the EMAC modules, the address map and register definitions for the ECC controllers of the 4-KB Tx FIFO RAM and the 16-KB Rx FIFO RAM are listed in this section.