Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

23.2. GPIO Interface Block Diagram and System Integration

The figure below shows a block diagram of the GPIO interface. The following table shows a pin table of the GPIO interface:

Figure 148. Arria 10 SoC GPIO
Table 224.  GPIO Interface pin table
Pin Name Mapped to GPIO Signal Name Comments
HPS_DIRECT_SHARED_Q1 [12:1] GPIO 0 [11:0] Shared Input / Output
HPS_DIRECT_SHARED_Q2 [12:1] GPIO 0 [23:12] Shared Input / Output
HPS_DIRECT_SHARED_Q3 [12:1] GPIO 1 [11:0] Shared Input / Output
HPS_DIRECT_SHARED_Q4 [12:1] GPIO 1 [23:12] Shared Input / Output
HPS_DEDICATED [17:4] GPIO 2 [13:0] Dedicated Input / Output