Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

20.5.5.1. Example: Slave Selection Software Flow for SPI Master

  1. If the SPI master is enabled, disable it by writing 0 to SSIENR.
  2. Write CTRLR0 to match the required transfer.
  3. If the transfer is receive only, write the number of frames into CTRLR1.
  4. Write BAUDR to set the transfer baud rate.
  5. Write TXFTLR and RXFTLR to set FIFO buffer threshold levels.
  6. Write IMR register to set interrupt masks.
  7. Write SER register bit 0 to 1 to select slave 1 in this example.
  8. Write SSIENR register bit 0 to 1 to enable SPI master.