Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

29.5.1. Platform Designer (Standard) Peripheral Port Interface Mapping

For many of the HPS component peripherals, the Platform Designer (Standard) ports can be routed to the HPS pins, FPGA pins or both. The following tables show the available mappings.