Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

14.4.2.1. Bootstrap Setting Bits

The following table lists the relevant bootstrap setting bits, found in the system manager’s NAND flash controller register group. As an example, this table also lists recommended bootstrap settings for a 512-byte page device.

Table 119.   Bootstrap Setting Bits
Bit Example Value for 512-Byte Page
noinit 126
page512 1
noloadb0p0 1
tworowaddr
  • 1—flash device supports two‑cycle addressing
  • 0—flash device support three‑cycle addressing
26 When this register is set, the NAND flash controller expects the host to program the related device parameter registers. For more information, refer to "Configuration by Host".