Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

10.3.12.2. Implementation Details

The configuration and control for the GIC is memory‑mapped and accessed through the SCU. The GIC are clocked by mpu_periph_clk, running at ¼ the rate of mpu_clk.