Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

29.5.1.5. USB 2.0 OTG Controller Interface

Table 244.  USB 2.0 OTG Controller Platform Designer (Standard) Port Mappings
Platform Designer (Standard) Port Name Routed to FPGA Routed to HPS I/O HPS Pin Name
usb0_ulpi_clk No Yes USB0_CLK
usb0_ulpi_dir No Yes USB0_DIR
usb0_ulpi_nxt No Yes USB0_NXT
usb0_ulpi_stp No Yes USB0_STP
usb0_ulpi_data_i[7:0] No Yes USB0_DATA[7:0]
usb0_ulpi_data_o[7:0] No Yes
usb0_ulpi_data_oe[7:0] No Yes
usb1_ulpi_clk No Yes USB1_CLK
usb1_ulpi_dir No Yes USB1_DIR
usb1_ulpi_nxt No Yes USB1_NXT
usb1_ulpi_stp No Yes USB1_STP
usb1_ulpi_data_i[7:0] No Yes USB1_DATA[7:0]
usb1_ulpi_data_o[7:0] No Yes
usb1_ulpi_data_oe[7:0] No Yes