Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

12.4.4.5. Error Checking and Correction Algorithm

The HPS error checking algorithm is based on an extended Hamming code, which is single-error correcting and double-error detecting (SECDED).

The computation can be understood by a given data (d) and a calculation of the check bits (c) through the equation:

c = d × Hd T

where H is the parity check matrix, H = {Hd,Hc}.

If the code word, designated by v and calculated by:

v = {d,c}

transmits to a noisy channel (for example in a RAM that is subjected to soft errors by cosmic rays) and becomes a contaminated code word, v', we can recover or discover the errors from its syndrome, s, by using the equation:

s = v' × HT

Errors are indicated when s does not equal 0. The syndrome shows the position of the error in the data.

The following examples show the parity check matrix for different data sizes.
Figure 51. 8-Bit Hamming Matrix
Figure 52. 16-bit Hamming Matrix
Figure 53. 32-bit Hamming Matrix
Figure 54. 35-bit Hamming Matrix
Figure 55. 136-bit Hamming Matrix