Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

30.1.3.1. Running HPS RTL Simulation

Platform Designer (Standard) generates scripts for several simulators that you can use to complete the simulation process, as listed in the following table.

Table 259.   Platform Designer (Standard)-Generated Scripts for Supported Simulators

Simulator

Script Name

Directory

Mentor Graphics* ModelSim

msim_setup.tcl

<project directory>/<design name> /simulation/mentor

Cadence® NC‑Sim

ncsim_setup.sh

<project directory>/<design name> /simulation/cadence

Synopsys* VCS

vcs_setup.sh

<project directory>/<design name> /simulation/synopsys/vcs

Synopsys*s VCS‑MX

vcsmx_setup.sh

<project directory>/<design name> /simulation/synopsys/vcsmx

Aldec* RivieraPro™

rivierapro_setup.tcl

<project directory>/<design name> /simulation/aldec