Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

10.8. Clocks

Three synchronous clocks and two debug clocks are provided to the MPU subsystem.

Table 97.  MPU Subsystem Clocks

System Clock Name

Use

mpu_clk

Main clock for the MPU subsystem

mpu_periph_clk

Clock for peripherals inside the MPU subsystem

mpu_l2_ram_clk

Clock for L2 cache and AXI interface clocks to and from the system interconnect

dbg_at_clk

Trace bus clock

dbg_clk

Debug clock