Intel® Arria® 10 Hard Processor System Technical Reference Manual

ID 683711
Date 8/28/2023
Public
Document Table of Contents

8.1.2.1. System Interconnect Block Diagram

The following figures show the system interconnect, including the main L3 interconnect, SDRAM L3 interconnect, and L4 buses.
Figure 27. High-Level System Interconnect Block DiagramThe following figure shows the relationships among the system interconnect and other major SoC components.