E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

2.1. Transceiver Design Flow in the Native PHY IP Core

The E-tile Native PHY IP core is the primary access point allowing you to access and customize the Native PHY IP core.

The E-tile Native PHY IP core supports the following usage modes:

  • PMA Direct
  • PMA Direct high data rate PAM4
  • Gearbox 64/66
  • PLL

The PMA Direct usage mode is for PMA NRZ and PAM4 usage in the E-tile Native PHY IP core. The data is transferred directly between PMA interface and FPGA fabric through the EMIB. You can place a total of 24 PMA Direct channels in one E-tile. This mode is supported for both NRZ and PAM4 with the following PMA interface widths:

  • 16
  • 20
  • 32
  • 40
  • 64 (Only in PMA Direct high data rate PAM4 mode)

The E-tile Native PHY IP core's integrated reset controller provides reset signals for the PMA Direct and PMA Direct high data rate PAM4 modes.

Figure 20. Transceiver Design Flow

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