E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

9.5.7. tx_aib_dsk_status

Description Address Addressing Mode
Status fields for TX Deskew 0x104 32-bits
The reset values in this table represents register values after a reset has completed.
Bit Name Description

SW Access

HW Access

Protection

Reset
11:8 tx_dsk_active_chans

Active Channels.

1 bit per channel (bit0 = EMIB chan 0). Indicates which EMIB channels received a deskew marker (since reset). This is a sticky bit that clears on reset and i_dsk_clear. For logging in RS-FEC CSR. CSR may treat this as a real time status signal.

RO

WO

-

0x0
7:4 tx_dsk_monitor_err

Skew Monitor Error Detected

1 bit per channel (bit0 =EMIB chan 0). This field only updates after a successful deskew. A non-zero value indicates that the deskewed Markers are no longer in alignment. 1 in each bit position indicates that the corresponding channel received a Deskew Marker before ALL enabled-channels received them.

Note: You can see which channels received Deskew Markers (at all) via o_tx_dsk_active_chans.

RO

WO

-

0x0
3:1 tx_dsk_status

Total-Channel-to-channel-skew status

Valid when tx_dsk_eval_done=1. Reports the total skew detected at the end of the deskew procedure

0..5: 0..5 cycles of delay added to remove skew

6..7:error detected

RO

WO

-

0x0
0 tx_dsk_eval_done

Deskew Complete

Means Deskew procedure has completed

RO

WO

-

0x0

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