E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

9.5.4. tx_aib_dsk_conf

Description Address Addressing Mode
Defines the configuration fields for TX Deskew 0x20 32-bits
The reset values in this table represents register values after a reset has completed.
Bit Name Description

SW Access

HW Access

Protection

Reset
7 tx_deskew_clear

EMIB Deskew clear

0:Normal deskew operation

1:TX EMIB deskew circuit in reset

RW

RO

-

0x0
3:0 tx_deskew_chan_sel

Specifies which channels to include in the deskew procedure

1= include

RW

RO

-

0x0

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