E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

3.1.10.4. Reconfiguring from Mission Mode to Channel Protection Mode

When you want to reconfigure an instantiated channel to channel protection mode, the reference clock configured in the design is used as the reference clock for channel protection mode unless you switch the reference clock while placing the channel in channel protection mode. This should be a stable, running clock, and not a dynamically changing clock.

You can change these instantiated channels to channel protection mode from mission mode through a sequence of Avalon® memory-mapped interface writes (see the table below) by any mechanism you have available, for example, by writing to the system console's Nios® processor.

Table 48.  Steps to Configure
Step Step Type PMA Attribute Code PMA Attribute Data Transceiver Register Address Transceiver Register Data Comments
Disable the PMA. PMA Attribute 0x0001 0x0000 Disables the PMA so that it can be reconfigured
Perform a PMA analog reset. IP Configuration Settings 0x203:0x200 0x81000000 Status is returned in register 0x207
Set encoding and data width. PMA Attribute 0x0014 0x0055
Set the TX baud rate. PMA Attribute 0x0005 0x1010 34 Compute the closest valid reference clock multiplier and send this value in the bottom eight bits of the PMA attribute data
Set the RX baud rate. PMA Attribute 0x0006 0x101034 Compute the closest valid reference clock multiplier and send this value in the bottom eight bits of the PMA attribute data
Set PRBS control. PMA Attribute 0x0002 0x0120 PRBS7
Set internal serial loopback. PMA Attribute 0x0008 0x0101
Save the values in channel addresses 0x05, 0x07, and 0x38. Saving the mission mode settings before entering channel protection mode          
Set DCC disable. Avalon® memory-mapped interface register Read-Modify-Write 0x38[1:0] 2'b01 Disables and bypasses the DCC
Set the RX clock. Avalon® memory-mapped interface register Read-Modify-Write 0x07[7,1] 1'b0, 1'b0 Disables the RX adapter clock and RX FIFO read clock
Set the TX clock. Avalon® memory-mapped interface register Read-Modify-Write 0x05[7:2] 6'b000010 Enables the TX datapath clock
Enable the TX/RX PMA. PMA Attribute 0x0001 0x0003 Enables TX and RX and disables the output driver
34 This is a simplified set of steps. For more details, refer to Detailed Steps for Reconfiguring from Mission Mode to Channel Protection Mode.

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