E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

4.2.1. Single 25 Gbps PMA Direct Channel (with FEC) Within a Single FEC Block

Table 55.  Single 25 Gbps PMA Direct Channel (with FEC) Within a Single FEC Block Configuration
Data Rate TX and RX Double Width PMA Interface Core Interface tx_clkout Clock Source
25.78125 Gbps Enabled 32 bits 64 bits Half-Rate

For FIFO in Phase Compensation mode, connect half rate tx_clkout (402.832031 MHz, that is, 25.78125 Gbps/64) to tx_coreclkin and rx_coreclkin. If you use any other source for tx_coreclkin, make sure tx_coreclkin has 0 PPM difference with tx_clkout.

Figure 67. PMA Direct with FEC

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