2.2.2. General and Datapath Parameters
In the Parameter Editor, the parameters are organized in the following sections for each functional block and feature:
- General, Datapath Options, and Common PMA Options
- TX PMA
- RX PMA
- Core Interface
- PMA Interface
- RS-FEC (when you enable this feature)
- Dynamic Reconfiguration
|Message level for rule violations||
|Specifies the messaging level to use for parameter rule violations. Selecting error causes all rule violations to prevent IP generation. Selecting warning displays all rule violations as warnings in the message window and allows IP generation despite the violations.|
|Transceiver configuration rules||
PMA direct high data rate PAM4
|Selects the protocol configuration rules for the transceiver. This parameter governs the rules for the correct settings of individual parameters. Certain features of the transceiver are available only for specific protocol configuration rules. This parameter is not a "preset". You must correctly set all other parameters for your specific protocol and application needs.|
|Specifies the operational mode of the transceiver:
The default is TX/RX Duplex.
|Number of data channels||1-24||Specifies the number of transceiver channels you want to implement. The default value is 1. The maximum value is 24.|
|Enable de-skew||On/Off||Enables deskew for PAM4 high data rate (PMA direct mode only)|
|Enable RSFEC||On/Off||Enables the RS-FEC functionality. 3|
|Provide separate interface for each channel||On/Off||When selected, the Native PHY IP core presents separate data, reset, and clock interfaces for each channel rather than a wide bus.|
|Enable datapath and interface reconfiguration||On/Off||Enables the ability to preconfigure and dynamically switch between the RS-FEC enabled and disabled modes.|
|Preserve Unused Transceiver Channels||On/Off||Preserves unused transceiver channels for PAM4 high data rate (PAM4 mode only)|
|Number of reference clock inputs||1-5||Specifies the desired number of reference clocks intended for the transmitter AND/OR receiver. This allows for dynamic clock source switching. Native PHY IP Core allows up to five clock inputs out of the possible nine for dynamic clock switching.|
|Initial TX reference clock input selection||0||This indicates the starting clock input selection used for this configuration when dynamically switching between multiple clock inputs.|
|Enable dedicated RX reference clock input||On/Off||Option to assign dedicated reference clock for the receiver instead of sharing it with the transmitter.|
|Dedicated RX clock input selection||0-4||When you enable the Enable Receiver dedicated reference clock input option, you can select the input clock with this parameter.|
|SerDes/Output Driver Enable Mode||
Enable Output Drivers
Disable Output Drivers
|Specifies the operation mode of the serializer and deserializer and the output driver for active channels (see the "SerDes/Output Driver Enable Mode" section below).|
|SerDes POR Exit Configuration||
Enable SerDes Configuration on Power Up
Disable SerDes Configuration on Power Up
|Enables or disables the serializer and deserializer configuration on power-up (device configuration). “Configuration” here refers to all transceiver settings. If this is set to Disable SerDes Configuration on Power Up, the transceiver is not configured and is not functional. Normally, you should select Enable SerDes Configuration on Power Up.|
SerDes/Output Driver Enable Mode
set_instance_assignment -name HSSI_PARAMETER "set_int_seq_serd_en=<Serdes/Output Driver Mode>" -to <CHANNEL_PORT_NAME>
set_instance_assignment -name HSSI_PARAMETER "set_int_seq_serd_en=SEQ_DIS_ALL" -to nphy|xcvr_native_s10_etile_0|g_xcvr_native_insts.ct3_xcvr_native_inst|inst_ct3_xcvr_channel|inst_ct3_hssi_xcvr -entity nrz_1ch
See the table below for QSF assignments and their corresponding modes.
|QSF Assignments (set_int_seq_serd_en)||PMA Attribute Data (to PMA Attribute Code 0x0001)||Output Driver||Receiver||Transmitter|
To put the TX in tri-state after power-on:
- Enable tri-state by writing PMA attribute data 0x0030 to PMA attribute code 0x002B.
- Disable the TX by writing PMA attribute data 0x0000 to PMA attribute code 0x0001.
To make the TX functional again after power-on:
- Disable tri-state by writing PMA attribute data 0x0020 to PMA attribute code 0x002B.
- Enable the TX by writing PMA attribute data 0x0007 to PMA attribute code 0x0001.
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