E-Tile Transceiver PHY User Guide

ID 683723
Date 7/08/2024
Document Table of Contents

2.2.1. General and Datapath Parameters

You can customize your instance of the Native PHY IP core by specifying parameter values.

In the Parameter Editor, the parameters are organized in the following sections for each functional block and feature:

  • General, Datapath Options, and Common PMA Options
  • TX PMA
  • RX PMA
  • Core Interface
  • PMA Interface
  • Reset
  • RS-FEC (when you enable this feature)
  • Dynamic Reconfiguration
Figure 22. General, Datapath, and Common PMA Options
Table 12.  General, Datapath Options, and Common PMA Options
Parameter Value Description
Message level for rule violations



Specifies the messaging level to use for parameter rule violations. Selecting error causes all rule violations to prevent IP generation. Selecting warning displays all rule violations as warnings in the message window and allows IP generation despite the violations.
Transceiver configuration rules

PMA direct

PMA direct high data rate PAM4

Gearbox 64/66


Selects the protocol configuration rules for the transceiver. This parameter governs the rules for the correct settings of individual parameters. Certain features of the transceiver are available only for specific protocol configuration rules. This parameter is not a "preset". You must correctly set all other parameters for your specific protocol and application needs.
Transceiver mode

TX/RX Duplex

Specifies the operational mode of the transceiver:
  • TX/RX Duplex: Specifies a single channel that supports both transmission and reception.

The default is TX/RX Duplex.

Number of data channels 1-24 Specifies the number of transceiver channels you want to implement. The default value is 1. The maximum value is 24.
Enable de-skew On/Off Enables deskew for PAM4 high data rate (PMA direct mode only)
Enable low rate PAM4 On/Off This parameter enables setting the correct default values for low rate PAM4 configuration when the value of this parameter is On. The default value for this parameter is Off.
Enable RSFEC On/Off Enables the RS-FEC functionality. 3
Provide separate interface for each channel On/Off When selected, the Native PHY IP core presents separate data, reset, and clock interfaces for each channel rather than a wide bus.
Enable datapath and interface reconfiguration On/Off Enables the ability to preconfigure and dynamically switch between the RS-FEC enabled and disabled modes.
Preserve Unused Transceiver Channels On/Off Preserves unused transceiver channels for PAM4 high data rate (PAM4 mode only)
Number of reference clock inputs 1-5 Specifies the desired number of reference clocks intended for the transmitter AND/OR receiver. This allows for dynamic clock source switching. Native PHY IP Core allows up to five clock inputs out of the possible nine for dynamic clock switching.
Initial TX reference clock input selection 0 This indicates the starting clock input selection used for this configuration when dynamically switching between multiple clock inputs.
Enable dedicated RX reference clock input On/Off Option to assign dedicated reference clock for the receiver instead of sharing it with the transmitter.
Dedicated RX clock input selection 0-4 When you enable the Enable Receiver dedicated reference clock input option, you can select the input clock with this parameter.
SerDes/Output Driver Enable Mode

Enable Output Drivers

Disable Output Drivers

Disable PMA

Specifies the operation mode of the serializer and deserializer and the output driver for active channels (see the "SerDes/Output Driver Enable Mode" section below).
  • Selecting Enable Output Drivers, writes PMA attribute data 0x0007 to PMA attribute code 0x0001.4
  • Selecting Disable Output Drivers, writes PMA attribute data 0x0003 to PMA attribute code 0x0001.
  • Selecting Disable PMA, writes PMA attribute data 0x0000 to PMA attribute code 0x0001.5
SerDes POR Exit Configuration

Enable SerDes Configuration on Power Up

Disable SerDes Configuration on Power Up

Enables or disables the serializer and deserializer configuration on power-up (device configuration). “Configuration” here refers to all transceiver settings. If this is set to Disable SerDes Configuration on Power Up, the transceiver is not configured and is not functional. Normally, you should select Enable SerDes Configuration on Power Up.

SerDes/Output Driver Enable Mode

This QSF assignment selects SerDes/Output Driver Enable Mode:
set_instance_assignment -name HSSI_PARAMETER "set_int_seq_serd_en=<Serdes/Output Driver Mode>" -to <CHANNEL_PORT_NAME>
set_instance_assignment -name HSSI_PARAMETER "set_int_seq_serd_en=SEQ_DIS_ALL" -to nphy|xcvr_native_s10_etile_0|g_xcvr_native_insts[0].ct3_xcvr_native_inst|inst_ct3_xcvr_channel|inst_ct3_hssi_xcvr -entity nrz_1ch

See the table below for QSF assignments and their corresponding modes.

Table 13.   set_int_seq_serd_en Values Available for QSF Assignments
QSF Assignments (set_int_seq_serd_en) PMA Attribute Data (to PMA Attribute Code 0x0001) Output Driver Receiver Transmitter
SEQ_DIS_ALL 0x0000 Disable Disable Disable
SEQ_EN_TX 0x0001 Disable Disable Enable
SEQ_EN_RX 0x0002 Disable Enable Disable
SEQ_EN_TX_RX 0x0003 Disable Enable Enable
SEQ_EN_OUTPUT 0x0004 Enable Disable Disable
SEQ_EN_OUTPUT_TX 0x0005 Enable Disable Enable
SEQ_EN_OUTPUT_RX 0x0006 Enable Enable Disable
SEQ_EN_ALL 0x0007 Enable Enable Enable
3 When you enable RS-FEC, the number of data channels is 1-4.

To put the TX in tri-state after power-on:

  1. Enable tri-state by writing PMA attribute data 0x0030 to PMA attribute code 0x002B.
  2. Disable the TX by writing PMA attribute data 0x0000 to PMA attribute code 0x0001.

To make the TX functional again after power-on:

  1. Disable tri-state by writing PMA attribute data 0x0020 to PMA attribute code 0x002B.
  2. Enable the TX by writing PMA attribute data 0x0007 to PMA attribute code 0x0001.