E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

1.3. E-Tile Layout in Intel® Agilex™ F-Series Device Variants

The Intel® Agilex™ F-Series device configuration includes both E-tile and P-tile transceivers.

Table 4.  Available E-Tile Transceiver Channels in Intel® Agilex™ FPGA Devices
Package Number of E-Tile Transceiver Channels Available E-Tile Transceiver Channel Locations
R2486A 16 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15, 20, 21, 22, 23
R2581A 24 0 through 23

Refer to the respective Pin-Out Files for Intel® FPGA Devices to find the actual number of reference clocks available in each device.

Figure 10.  Intel® Agilex™ Device with 2 P-Tiles and 1 E-Tile (56 Transceiver Channels)
Figure 11.  Intel® Agilex™ Device with 1 P-Tile and 1 E-Tile (32 Transceiver Channels)

Did you find the information on this page useful?

Characters remaining:

Feedback Message