E-Tile Transceiver PHY User Guide

ID 683723
Date 4/01/2024
Document Table of Contents

B.4. Instantiating the Transceiver Native PHY IP

This procedure describes how to instantiate your E-tile transceiver Native PHY IP core.
Locate the Stratix 10 E-Tile Transceiver Native PHY or Agilex™ 7 E-Tile Transceiver Native PHY IP core in the IP Catalog.
Figure 145. IP Catalog

The Native PHY IP Parameter Editor allows you to set many configurations, such as:

  • Transceiver configuration rules (PMA direct or PMA direct high data rate PAM4)
  • Number of data channels
  • TX/RX PMA modulation type (NRZ or PAM4)
  • TX/RX PMA data rate
  • TX/RX PMA reference clock frequency
Figure 146. IP Parameter Editor Settings
Figure 147. PMA Interface Options for PMA Direct High Data Rate PAM4

The PMA direct high data rate PAM4 transceiver configuration rule must select the 64 TX/RX PMA interface width. When instantiating an E-tile Native PHY IP core in a PMA direct high data rate PAM4 configuration, enable deskew in the IP GUI.