E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

9.5.19. rsfec_ln_skew_rx

Register Name Description Address Addressing Mode
rsfec_ln_skew_rx_0 RS-FEC FEC lane skew 0x1B0 32-bits
rsfec_ln_skew_rx_1 0x1B4
rsfec_ln_skew_rx_2 0x1B8
rsfec_ln_skew_rx_3 0x1BC
The reset values in this table represents register values after a reset has completed.
Bit Name Description

SW Access

HW Access

Protection

Reset
6:0 skew

Lane skew value (unit is 80 bits).

Only valid when the RX lanes are aligned.

Only applicable when RSFEC_CORE_CFG.frac = none (100GE/128GFC).

RO

WO

-

0x00

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