E-Tile Transceiver PHY User Guide

ID 683723
Date 9/30/2022
Public
Document Table of Contents

1.6. E-Tile Transceiver PHY Overview Revision History

Document Version Changes
2022.09.30 Made the following change:
  • Updated Supported Applications/Modes table with support for low rate PAM4 with fractured RS-FEC.
2021.11.16 Made the following changes:
  • Updated Intel® Agilex™ Device with 2 P-Tiles and 1 E-Tile (56 Transceiver Channels) figure with AGF 019 and AGF 023 Intel® Agilex™ devices.
  • Updated Transceiver Counts in Intel® Agilex™ Devices with E-Tile (R2486A, R2581A) table with AGF 019 and AGF 023 Intel® Agilex™ devices.
2021.10.04 Made the following change:
  • Added 100G PAM4 w/ FEC support to Supported Applications/Modes.
  • Added link to Intel® Stratix® 10 Device Data Sheet and Intel® Agilex™ Device Data Sheet.
2020.06.02 Made the following changes:
  • Removed the AGF 008 device.
  • Removed the R2013A and R2514A packages.
  • Added the R2581A package.
2019.10.11 Made the following changes:
  • Re-wrote the overview to be E-tile-specific rather than product-specific.
  • Updated Intel® Stratix® 10 TX H-Tile and E-Tile Configurations.
  • Added Intel® Stratix® 10 DX device details in E-Tile Layout in Intel® Stratix® 10 Device Variants.
  • Added Intel® Stratix® 10 DX P-Tile and E-Tile Configurations.
  • Added the "Transceiver Counts in Intel® Stratix® 10 DX Devices with E-Tiles (JF43, TF53, TF55)" table.
  • Added E-Tile Layout in Intel® Agilex™ F-Series Device Variants.
  • Added the "Transceiver Counts in Intel® Agilex™ Devices with E-Tiles (R2013A, R2486A, R2514A)" table.
  • Added the Related Information links for the Intel® Agilex™ device documents.
  • Clarified that not all device packages support all 24 transceiver channels in an E-tile.
2019.07.29 Made the following change:
  • Changed Intel® Stratix® 10 TX Advance Information Brief to Intel® Stratix® 10 TX Device Overview.
2019.04.19 Made the following changes:
  • Added the "1588 PTP for Ethernet" building block.
  • Added "Different TX and RX refclk is supported in simplex mode only; dual simplex is not supported."
  • Added support for the 128G Fibre Channel w/ FEC mode.
2019.03.07 Made the following change:
  • Changed the data rate for E-tile Non-Return to Zero (NRZ) to 28.9 Gbps.
2019.02.04 Made the following changes:
  • Updated figures in " Intel® Stratix® 10 TX H-Tile and E-Tile Configurations".
  • Updated "Transceiver Counts in Intel® Stratix® 10 TX Devices with E-Tiles (NF43, SF50, UF50, YF55)."
  • Updated "Transceiver Counts in Intel® Stratix® 10 MX Devices with E-Tiles (UF55)."
2018.10.08 Made the following changes:
  • Changed the description of Inputs in the "Key Reference Clock Considerations" table.
  • Removed the "TX and RX with Different Reference Clocks" figure.
  • Clarified the descriptions for the transmitter PMA and loopback paths in the "Transceiver Tile Feature Comparison" table.
2018.07.18 Made the following changes:
  • Changed the PAM4 data rate to 57.8 Gbps in the "Transceiver Tile Variants" table.
2018.05.15 Made the following changes:
  • Updated the "GXE Channel Usage Example: Channels Running at Data Rates > 30 Gbps PAM4PMA Direct Mode without RS-FEC" figure
  • Updated the "GXE Channel Usage Example: Channels Running at Data Rates < 30 GbpsPAM4/NRZ PMA Direct Mode without RS-FEC" figure.
  • Updated the "Ethernet Hard IP Overview" figure.
  • Added the "Supported Applications/Modes" section.
  • Removed the 50GbE PAM4 w/ FEC application from the "Supported Applications/Modes" table.
2018.01.31 Initial release.

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