E-Tile Transceiver PHY User Guide

ID 683723
Date 4/01/2024
Document Table of Contents Dedicated Balanced PLL Reference Clock Tree

Once bonding is enabled, use refclk0 on the hardware. This clock is connected to the transceiver through a dedicated balanced clock tree. You do not need to do anything on Native PHY side. You can select any reference clock; however, the fitter checks that your selection on the reference clock number in the Native PHY is assigned to refclk0 in the Quartus® Prime settings file (.qsf) assignments.